1. Field of the Invention
The present invention relates generally to a signal processing circuit and a liquid crystal display apparatus. More particularly, the invention relates to a signal processing circuit provided with signal processing means for non-inverting and inverting an input signal based on a reference potential and outputting the resulting signal. The invention also relates to a liquid crystal display apparatus using the above-described signal processing circuit.
2. Related Background Art
Hitherto, the following type of signal processing circuit shown in FIG. 11 has been known: a signal processing circuit for amplifying an input signal while switching it between non-inverting periods and inverting periods.
Referring to FIG. 11, the signal processing circuit includes an amplifier 11, a comparator 12, a low pass filter (LPF) 13, and reference voltage sources 14a and 14b (the respective reference voltages are indicated by V0 and V1, which may be equal to each other). Upon receiving an input signal (IN), the amplifier 11 compares the input signal (IN) with the reference voltage V1 of the reference voltage source 14b to produce a difference signal of the above two signals. It then amplifies the difference signal and outputs the resulting signal which has non-inverting periods and inverting periods. It should be noted that the amplifier 11 is controlled, based on a non-inverting control signal and an inverting control signal, to output a signal of non-inverting periods and inverting periods. These outputs are averaged in the LPF 13, and the averaged voltage is compared with the reference voltage V0 in the comparator 12. The output of the comparator 12 is then fed-back to the amplifier 11. In this manner, the DC level adjustments of the output signal are performed.
The signal processing circuit of the above type may be used, for example, in a liquid crystal display apparatus. Referring to the block diagram shown in FIG. 12, the drive circuit of a liquid crystal panel comprises: input terminals 51 for video signals, primarily red, blue, green (RGB) color signals in this example; a clamping circuit 52 for maintaining the black (the darkest) level of signals; a gain control/gamma conversion circuit 53 for varying the amplitude of signals and changing the gamma characteristics; an inverting control/signal amplifying circuit 54 for sequentially switching an input signal between non-inverting periods and inverting periods at predetermined intervals and outputting a liquid crystal-driving signal; and a feedback circuit 55 for maintaining the center potential of a liquid crystal-driving signal. An output stage 58 for drive signals includes the inverting control/signal amplifying circuit 54 and the feedback circuit 55. The circuit illustrated in FIG. 11 is applicable to this output stage 58. In FIG. 12, there are also shown a liquid crystal panel 56 and a logic section 57 for forming a clamping pulse, an inverting-control pulse, and a liquid crystal panel-driving pulse.
FIG. 13 is a circuit diagram of the liquid crystal panel 56 shown in FIG. 12. There are shown a pixel portion 61; a horizontal shift register (HSR) 62 used as scanning means in the horizontal direction; a vertical shift register (VSR) 63 serving as scanning means in the vertical direction; input terminals 64-1, 64-2 and 64-3 for signals; a start pulse (HST) 62-1 of the HSR 62; two-phase clock pulses (H1 and H2) 62-2 and 62-3 of the HSR 62; a start pulse (VST) 63-1 of the VSR 63; and two-phase clock pulses (V1 and V2) 63-2 and 63-3 of the VSR 63. The pixel portion 61 includes thin film transistors 6a, liquid crystals 6b, hold capacitors 6c, opposing electrodes 6d, video lines 6e, vertical signal lines 6f, gate (scanning) lines 6g, and signal-line selection switches 6h.
Signals input from the input terminals 64-1, 64-2 and 64-3 charge the liquid crystals 6b and the hold capacitors 6c through the video lines 6e, the transfer switches 6h of the HSR 62, and the vertical signal lines 6f in response to the actuation of the thin film transistors 6a. To prevent a deterioration in the liquid crystal panel 56 due to burning or other reason, the signal applied to the liquid crystals 6b is alternating current having non-inverting periods and inverting periods at regular intervals relative to the voltage of the opposing electrodes 6d. The feedback circuit 55 illustrated in FIG. 12 functions to regulate the signal DC level so that the center voltage of the liquid crystal-driving signal having non-inverting and inverting periods can constantly approximate the voltage of the opposing electrodes.
However, the aforedescribed signal processing circuit presents the following problems:
(1) the necessity of changing the time constant of the LPF in response to the speed of input/output signals; PA1 (2) the incorrect adjustment of the DC level of the signal which is significantly changed every time the signal is switched between non-inverting periods and inverting periods; and PA1 (3) the requirement for long stabilization time with time constants of several hundreds of horizontal scanning periods (H) (up to 30 milliseconds) caused by, for example, the necessity to average the data obtained in one horizontal scanning period (1H) (typically 62 microseconds) in a liquid crystal drive apparatus.
The above-described problem (2) will now be explained in greater detail with reference to FIG. 14. An input signal has periods to be non-inverted NIVS and periods to be inverted IVS having different characteristics. In this case, the mean value of the non-inverting periods and inverting periods of the output signal deviates from the center value of the output signal. Accordingly, the deviated mean voltage value is unfavorably compared with the reference voltage V0, and the result is fed-back to the amplifier 54, thereby failing to perform the correct adjustments of the DC level.
This problem will be further explained when the above-described signal processing circuit is applied to a liquid crystal display apparatus by way of example. FIG. 15 illustrates an example of the pixel array of the liquid crystal panel 56. Formed on this panel 56 are pixels of red (R), green (G) and blue (B) in a delta form. For allocating the color signals to the respective pixels in accordance with this array, different color pixels (R and B, G and R, B and G) may be connected to the same vertical signal line 6f shown in FIG. 13 in the respective horizontal lines. This requires the switching of the signal between the different color pixels to be input into the input terminal 64-1 (64-2 and 64-3) in the respective horizontal scanning periods, such as R (G, B) in the first horizontal scanning period, B (R, G) in the second horizontal scanning period, R (G, B) in the third horizontal scanning period, B (R, G) in the fourth horizontal scanning period, and likewise for each horizontal scanning period.
FIG. 16 is a block diagram of the drive circuit for the liquid crystal panel 56 required for this operation. The same elements corresponding to those shown in FIG. 12 are designated by like reference numerals, and an explanation thereof will thus be omitted. In FIG. 16, there is shown a switch circuit 91 for rearranging the signals in each horizontal scanning period based on the inverting control pulse output from the logic section 57.
FIG. 17 illustrates an input waveform and an output waveform of the output stage 58 of the circuit illustrated in FIG. 16. The input signal is alternately changed by R and B in the first, second, third and fourth horizontal scanning periods (the first H through the fourth H periods), and the resulting output signal is inverted every other horizontal scanning period (1H period). In this case, if the integral of the color signal R differs from that of the color signal B, the center level of the actual output signal deviates from the reference voltage V0 of the circuit shown in FIG. 11 (8a.noteq.8b). This is one of the reasons for the deterioration of image quality.